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EUA6210 Output Capacitor-less 67mW Stereo Headphone Amplifier
DESCRIPTION
The EUA6210 is an audio power amplifier primarily designed for headphone applications in portable device applications. It is capable of delivering 67mW of continuous average power per channel into a 16[ load with less than 1% distortion (THD+N) from a 3.3V power supply. The EUA6210 utilizes a new circuit topology that eliminates output coupling capacitors and half-supply bypass capacitors. It is ideally suited for low-power portable applications where minimal space and power consumption are primary requirements. The EUA6210 is also unity-gain stable and can be configured by external gain-setting resistors. Other features include click/pop suppression, low-power shutdown mode and thermal shutdown protection.
FEATURES
67mW per Channel into 16 from a 3.3V Supply at THD=1% (Typ) No Output Coupling Capacitors and Half-Supply Bypass Capacitor Required Integrated Click & Pop Suppression Ultra-low <1A Shutdown Current Ultra-Gain Stable 2.7V-5.5V Operation Available MSOP-8 Package RoHS Compliant and 100% Lead(Pb)-Free
APPLICATIONS
Mobile Phones PDAs Portable Electronic Devices Notebook Computers
Typical Application Circuit
Figure1.
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Pin Configurations
Package Type Pin Configurations
MSOP-8
Pin Description
PIN PIN I/O DESCRIPTION
IN1 IN2
SHUTDOWN
1 2 3 4 5 6 7 8
I I I I O O O
Channel 1 input, connected to the feedback resistor Rf and to the input resistor Rin. Channel 2 input, connected to the feedback resistor Rf and to the input resistor Rin. The device enters in shutdown mode when a low level is applied on this pin. Ground. Analog VDD input supply. Reference for speaker. Channel 2 output. Channel 1 output.
GND VDD VO3 VO2 VO1
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Ordering Information
Order Number Package Type Marking Operating Temperature range
EUA6210MIR1
MSOP-8
xxxxx A6210
-40 C to 85C
EUA6210
1/4
1/4
1/4
1/4
Lead Free Code 1: Lead Free 0: Lead Packing R: Tape & Reel Operating temperature range I: Industry Standard Package Type M: MSOP
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Absolute Maximum Ratings
u u
u
u
u
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Supply voltage, -----------------------------------------------------------------------------------------------6V Input voltage ----------------------------------------------------------------------------------- -0.3 V to VDD +0.3V Storage temperature --------------------------------------------------------------------------------- -65C to 150C Power Dissipation ----------------------------------------------------------------------------------- Internally Limited ESD Susceptibility Pin6 -------------------------------------------------------------------------------------8kV ESD Susceptibility for other Pins --------------------------------------------------------------------------2kV Junction Temperature --------------------------------------------------------------------------------------- 150C Thermal Resistance JC (MSOP) ----------------------------------------------------------------------------------------------- 56C/W JA (MSOP) ----------------------------------------------------------------------------------------------- 160C/W
Electrical Characteristics VDD = 3.3V
The following specifications apply for VDD=3.3V, AV=1, and 32 load unless otherwise specified. Limits apply to
TA=25J .
Symbol
IDD ISD VOS PO
Parameter
Quiescent Power Supply Current Shutdown Current Output Offset Voltage Output Power
Conditions
VIN=0V, 32 load VSHUTDOWN=GND THD=1%(max); f=1kHz, 32 load THD=1%(max); f=1kHz, 16 load PO=30mWrms; f=1kHz Vripple=200mVp-p sinewave Input Terminated with 10 ohms to ground
EUA6210 Typ Min Max. (Note1)
4.1 0.1 4 30 35 6 1.0 30
Unit
mA A mV mW
67 0.2 59(f=217Hz) 48(f=1kHz) 1.5 0.4 % dB V V
THD+N Total Harmonic Distortion + Noise PSRR VIH VIL Power Supply Rejection Ratio Shutdown Input Voltage High Shutdown Input Voltage Low
Note 1: Typicals are measured at 25C and represent the parametric norm. Note 2: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Note 3: If the product is in shutdown mode and VDD exceeds 6V (to a max of 8V VDD) then most of the excess current will flow through the ESD protection circuits.If the source impedance limits the current to a max of 10ma then the part will be protected. If the part is enabled when VDD is above 6V circuit performance will be curtailed or the part may be permanently damaged.
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Typical Operating Characteristics
Figure2. THD+N vs. Frequency
Figure3. THD+N vs. Frequency
Figure4. THD+N vs. Frequency
Figure5. THD+N vs. Output Power
Figure6. THD+N vs. Output Power
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Figure7. THD+N vs. Output Power
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Figure8. Output Power vs. Load Resistance
Figure9. Output Power vs. Load Resistance
Figure10. Channel Separation vs. Frequency
Figure11. Noise vs. Frequency
Figure12. Output Power vs. Supply Voltage
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Figure13. Power Dissipation vs. Output Power
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Figure14. Power Dissipation vs. Output Power
Figure15. Power Supply Rejection Ratio vs. Frequency
Figure16. Power Supply Rejection Ratio vs. Frequency
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Application Information
Eliminating Output Coupling Capacitors Typical single-supply audio amplifiers that drive singleended (SE) headphones use a coupling capacitor on each SE output. This output coupling capacitor blocks the half supply voltage to which the output amplifiers are typically biased and couples the audio signal to the headphones. The signal return to circuit ground is through the headphone jack's sleeve. The EUA6210 eliminates these output coupling capacitors. Amp3 is internally configured to apply a bandgap referenced voltage (VREF = 1.58V) to a stereo headphone jack's sleeve. This voltage matches the quiescent voltage present on the Amp1 and Amp2 outputs that drive the headphones. The headphones operate in a manner similar to a bridge-tied-load (BTL). The same DC voltage is applied to both headphone speaker terminals. This results in no net DC current flow through the speaker. AC current flows through a headphone speaker as an audio signal's output amplitude increases on the speaker's terminal. The headphone jack's sleeve is not connected to circuit ground. Using the headphone output jack as a line-level output will place the EUA6210's bandgap referenced voltage on a plug's sleeve connection. This presents no difficulty when the external equipment uses capacitively coupled inputs. For the very small minority of equipment that is DC coupled, the EUA6210 monitors the current supplied by the amplifier that drives the headphone jack's sleeve. If this current exceeds 500mAPK, the amplifier is shutdown, protecting the EUA6210 and the external equipment. Eliminating the Half-Supply Bypass Capacitor Typical single-supply audio amplifiers are normally biased to1/2VDD in order to maximize the output swing of the audio signal. This is usually achieved with a simple resistor divider network from VDD to ground that provides the proper bias voltage to the amplifier. However, this scheme requires the use of a half-supply bypass capacitor to improve the bias voltage's stability and the amplifier's PSRR performance. The EUA6210 utilizes an internally generated, buffered bandgap reference voltage as the amplifier's bias voltage. This bandgap reference voltage is not a direct function of VDD and therefore is less susceptible to noise or ripple on the power supply line. This allows for the EUA6210 to have a stable bias voltage and excellent PSRR performance even without a half-supply bypass capacitor. Amplifier Configuration Explanation As shown in Figure 1, the EUA6210 has three operational amplifiers internally. Two of the amplifier's have externally configurable gain while the other amplifier is internally fixed at the bias point acting as a unity-gain buffer. The closed-loop gain of the two configurable amplifiers is set by selecting the ratio of Rf to Ri. Consequently, the gain for each channel of the IC is
Av = - ( R f / R i )
By driving the loads through outputs VO1 and VO2 with VO3 acting as a buffered bias voltage the EUA6210 does not require output coupling capacitors. The typical single-ended amplifier configuration where one side of the load is connected to ground requires large, expensive output coupling capacitors. A configuration such as the one used in the EUA6210 has a major advantage over single supply, single-ended amplifiers. Since the outputs VO1, VO2, and VO3 are all biased at VREF= 1.58V, no net DC voltage exists across each load. This eliminates the need for output coupling capacitors that are required in a single-supply, single-ended amplifier configuration. Without output coupling capacitors in a typical single-supply, single-ended amplifier, the bias voltage is placed across the load resulting in both increased internal IC power dissipation and possible loudspeaker damage. Current Limit Protection Circuitry In order to limit excessive power dissipation in the load when a shout-circuit occurs, the current limit in the load is fixed to 250mA. The current in the output MOS transistors is real-time monitored, and when exceeding 250mA, the gate voltage of the corresponding MOS transistor is clipped and no more current can be delivered. Micro Power Shutdown The voltage applied to the SHUTDOWN pin controls the EUA6210's shutdown function. Activate micro-power shutdown by applying a logic-low voltage to the SHUTDOWN pin. When active, the EUA6210's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The trigger point is 0.4V(max) for a logic-low level, and 1.5v(min)for a logic-high level. The low0.1A (typ) shutdown current is achieved by applying a voltage that is as near as ground as possible to the SHUTDOWN pin. A voltage that is higher than ground may increase the shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect a external 100k pull-up resistor between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin and ground. Select normal amplifier operation by opening the switch. Closing the switch connects the SHUTDOWN pin to ground, activating micro-power shutdown. The switch and resistor
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guarantee that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or microcontroller, use a digital output to apply the control voltage the SHUTDOWN pin. Driving the SHUTDOWN pin with active circuitry eliminates the pull-up resistor.
Power Dissipation Power dissipation is a major concern when designing a successful amplifier. A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. The maximum power dissipation for a given application can be derived from the power dissipation graphs or from Equation 1.
In addition to system cost and size, turn-on time is affected by the size of the input coupling capacitor Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage. This charge comes from the output via the feedback Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on time can be minimized. A small value of Ci (in the range of 0.1F to 0.39F), is recommended.
Power Supply Bypassing As with any amplifier, proper supply bypassing is important for low noise performance and high power supply rejection. The capacitor location on the power supply pins should be as close to the device as possible. Typical applications employ a 3.3V regulator with 10F tantalum or electrolytic capacitor and a ceramic bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of the EUA6210. A bypass capacitor value in the range of 0.1F to 1F is recommended for CS. Using External Powered Speakers TheEUA6210 is designed specifically for headphone operation. Often the headphone output of a device will be used to drive external powered speakers. The EUA6210 has a differential output to eliminate the output coupling capacitors. The result is a headphone jack sleeve that is connected to VO3 instead of GND. For powered speakers that are designed to have single-ended signals at the input, the click and pop circuitry will not be able to eliminate the turn- on/turn-off click and pop. Unless the inputs to the powered speakers are fully differential the turn-on/ turn-off click and pop will be very large. ESD Protection As stated in the Absolute Maximum Ratings, pin 6(VO3) on the EUA6210 has a maximum ESD susceptibility rating of 8kV. For higher ESD voltages, the addition of a PCDN042 dual transil (from California Micro Devices), as shown in Figure 17, will provide additional protection.
PDMAX = 4(VDD )2 / 2 R L ----------------------------(1)
It is critical that the maximum junction temperature TJMAX of 150J is not exceeded. Since the typical application is for headphone operation (32 impedance ) using a 3.3V supply the maximum power dissipation is only 138mW. Therefore power dissipation is not a major concern.
Gain-Setting Resistor Selection (Ri and Rf) Ri and Rf set the closed-loop gain of the amplifier. In order to optimize device and system performance, the EUA6210 should be used in low gain configurations. The low gain configuration minimizes THD + noise values and maximizes the signal to noise ratio, and the amplifier can still be used without running into the bandwidth limitations. Low gain configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1Vrms are available from sources such as audio codecs. A closed loop gain in the range from 2 to 5 is recommended to optimize overall system performance. An input resistor (Ri) value of 20k is realistic in most of applications, and does not require the use of a too large capacitor Cin. Input Capacitor Selection (Ci) Amplifiying the lowest audio frequencies requires a high value input coupling capacitor, Ci. A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the headphones used in portable systems have little ability to reproduce signals below 60Hz. Applications using headphones with this limited frequency response reap little improvement by using a high value input capacitor.
(
)
Figure 17.
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Packaging Information
MSOP-8
SYMBOLS A A1 D E1 E L b e
MILLIMETERS MIN. MAX. 1.10 0.00 0.15 3.00 3.00 4.70 5.10 0.40 0.80 0.22 0.38 0.65
INCHES MIN. 0.000 0.118 0.118 0.185 0.016 0.008 0.026 0.201 0.031 0.015 MAX. 0.043 0.006
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